Localizing faults in simulink/stateflow models with STL Conference Paper


Author(s): Bartocci, Ezio; Ferrère, Thomas; Manjunath, Niveditha; Ničković, Dejan
Title: Localizing faults in simulink/stateflow models with STL
Title Series: HSCC Proceedings
Affiliation IST Austria
Abstract: Fault-localization is considered to be a very tedious and time-consuming activity in the design of complex Cyber-Physical Systems (CPS). This laborious task essentially requires expert knowledge of the system in order to discover the cause of the fault. In this context, we propose a new procedure that AIDS designers in debugging Simulink/Stateflow hybrid system models, guided by Signal Temporal Logic (STL) specifications. The proposed method relies on three main ingredients: (1) a monitoring and a trace diagnostics procedure that checks whether a tested behavior satisfies or violates an STL specification, localizes time segments and interfaces variables contributing to the property violations; (2) a slicing procedure that maps these observable behavior segments to the internal states and transitions of the Simulink model; and (3) a spectrum-based fault-localization method that combines the previous analysis from multiple tests to identify the internal states and/or transitions that are the most likely to explain the fault. We demonstrate the applicability of our approach on two Simulink models from the automotive and the avionics domain.
Keywords: Temporal logic; Hybrid systems; embedded systems; Internal state; Specifications; Interface states; Cyber-Physical System (CPS); Expert knowledge; Fault localization; Hybrid system models; Observable behavior; Simulink modeling; Simulink models; Program debugging
Conference Title: HSCC: Hybrid Systems: Computation and Control
Conference Dates: April 11 - 13. 2018
Conference Location: Porto, Portugal
ISBN: 9781450356428 (ISBN)
Publisher: Association for Computing Machinery, Inc  
Date Published: 2018-04-11
Start Page: 197
End Page: 206
DOI: 10.1145/3178126.3178131
Open access: no
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